发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device in which a leak current which obviously appears when the gate length of a MONOS-type transistor is reduced can be reduced and erroneous deletion (disturbance) can be reduced, and to provide the manufacturing method of the device. SOLUTION: In a non-volatile memory cell including a MONOS-type transistor Q<SB>1</SB>for memory and a MIS-type transistor Q<SB>2</SB>for cell selection, the length B of a charge accumulation film 16 is made shorter than that A of the gate electrode 20 of the MONOS-type transistor Q<SB>1</SB>. The charge accumulation film 16 is prevented from being formed below the end of the gate electrode 20. An oxide film below the end of the gate electrode 20 is made thick. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005064178(A) 申请公布日期 2005.03.10
申请号 JP20030291275 申请日期 2003.08.11
申请人 RENESAS TECHNOLOGY CORP 发明人 NAKAJIMA NOBUE;KANBARA SHIRO
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
代理机构 代理人
主权项
地址