| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce costs for production by simplifying memory cell structure and control of memory operation. <P>SOLUTION: This memory is provided with a gate electrode 24 provided on a p-type semiconductor substrate 12 through a gate oxidation film 22, and a transistor having a source area 16 and a drain area 18 of a pair of n-type impurity diffusion areas at positions in the surface layer area of the semiconductor substrate and on both of the sides of the gate electrode. In the area inserted by the source area, the drain area and a channel forming area 20, a first resistance varying part 26 and a second resistance varying part 28 as areas are respectively provided wherein the n-type impurity density is lower than those in the source area and the drain area. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
