发明名称 SCHEDULING METHOD AND INFORMATION PROCESSING SYSTEM
摘要 <p><P>PROBLEM TO BE SOLVED: To realize the power save of a processor without damaging real time performance. <P>SOLUTION: The execution timings of three processing elements A, B and C in respective cycles with specific time intervals as units are decided so that real time processing including those processing elements A, B and C can be periodically executed by a processor(VPU) with preliminarily decided specific time intervals in scheduling processing. Then, processing to decrease the operating speed of the VPU is executed based on the occupancy rate of a period T1 since the start timing of each cycle until the execution of the real time processing including the processing elements A, B and C is completed to the time interval of each cycle. For example, when the length of the period T1 is 1/2 of the time interval of each cycle, control to decrease the operating speed of the VPU is executed so that the length of the period T1 can be extended to the neighborhood of the time interval of each cycle. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005062956(A) 申请公布日期 2005.03.10
申请号 JP20030207572 申请日期 2003.08.14
申请人 TOSHIBA CORP 发明人 KANAI TATSUNORI;MAEDA SEIJI;YANO HIROKUNI;YOSHII KENICHIRO
分类号 G06F1/32;G06F1/04;G06F9/38;G06F9/46;G06F9/48;G06F15/80;(IPC1-7):G06F1/32 主分类号 G06F1/32
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