摘要 |
A multi-level flash memory cell is read by comparing the cell's threshold voltage (111, 110, 101, 100, 011, 010, 001, 000) to a plurality of integral reference voltages (Vmin, V1, V2, V3, V4, V5, V6, V7, and Vmax) and to a fractional reference voltage (V0.5, V1.5, V2.5, V3.5, V4.5, V5.5, V6.5, and V7.5). Multi-level cells of a flash memory are programmed collectively with data and redundancy bits at each significance level, preferably with different numbers of data and redundancy bits at each significance level. The cells are read collectively, from lowest to highest significance level, by correcting the bits at each significance level according to the redundancy bits and adjusting the bits of the higher significance levels accordingly. The adjustment following the correction of the least significant bits is in accordance with comparisons of a cell's threshold voltages to fractional reference voltages. |
申请人 |
M-SYSTEMS FLASH DISK PIONEERS LTD.;BAN, AMIR;LITSYN, SIMON;ALROD, IDAN |
发明人 |
BAN, AMIR;LITSYN, SIMON;ALROD, IDAN |