发明名称 I/Q DEMODULATION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide an I/Q demodulation circuit capable of correcting a DC offset and a phase offset without delay in the case of an I/Q demodulation operation. <P>SOLUTION: This I/Q demodulation circuit has a reference sinusoidal signal generator 102, a selector 103, an offset amount detection circuit 106, a storage circuit 107 and an offset correction circuit 108. An offset amount obtained in an offset detection mode is stored beforehand, offset correction is performed on the basis of the stored information in a normal receiving mode. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005064990(A) 申请公布日期 2005.03.10
申请号 JP20030294067 申请日期 2003.08.18
申请人 SHARP CORP 发明人 NAKANO YOSHIAKI
分类号 H03D7/00;H04L25/06;H04L27/00;H04L27/14;H04L27/16;H04L27/22;H04L27/38 主分类号 H03D7/00
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