发明名称 System and methed for effective field loss analysis for semiconductor wafers
摘要 This invention relates to a method for yield loss analysis of process steps of semiconductor wafers having a plurality of dies, and more particularly relates to a defect inspection technique to determine a hit ratio, computation of yield impact contributions for the defects, and determination of a kill ratio for a specific type of defect. Yield loss is estimated ultimately upon a choice of a defect density distribution function. A defect calibrated factor and a yield impact calibrated factor are introduced herein.
申请公布号 US2005055121(A1) 申请公布日期 2005.03.10
申请号 US20030655850 申请日期 2003.09.04
申请人 WANG WUN 发明人 WANG WUN
分类号 G05B23/02;G06F19/00;(IPC1-7):G06F19/00 主分类号 G05B23/02
代理机构 代理人
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