发明名称 POWER MODULE FLIP CHIP PACKAGE HAVING REDUCED RESISTANCE, REDUCED INDUCTANCE, AND IMPROVED RELIABILITY
摘要 PURPOSE: A power module flip chip package is provided to reduce a resistance and inductance, and improve reliability by connecting a power semiconductor device to a package substrate by a flip-chip method. CONSTITUTION: A package carrier(110) includes a front side(110F) and a back side(110B) opposite to the front side. A plurality of conductive bumps(BG,BS,BD) are formed on the front side of the package carrier. A power semiconductor device(120) is electrically connected to the package carrier through the conductive bumps. The conductive bumps are electrically connected to a gate terminal, a source terminal, and a drain terminal of the power semiconductor device.
申请公布号 KR20050022881(A) 申请公布日期 2005.03.08
申请号 KR20030059487 申请日期 2003.08.27
申请人 FAIRCHILD KOREA SEMICONDUCTOR LTD. 发明人 CHOI, SEUNG YONG;NOQUIL JONATHAN A.
分类号 H01L25/04;H01L23/31;H01L23/498;H01L25/07 主分类号 H01L25/04
代理机构 代理人
主权项
地址
您可能感兴趣的专利