发明名称 |
Stabilization technique for phase-locked frequency synthesizers |
摘要 |
A stabilization technique that relaxes the tradeoff between the settling speed and the magnitude of output sidebands in phase-locked frequency synthesizers. The method introduces a zero in the open-loop transfer function through the use of a discrete-time delay element, thereby obviating the need for resistors in the loop filter.
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申请公布号 |
US6864753(B2) |
申请公布日期 |
2005.03.08 |
申请号 |
US20030353432 |
申请日期 |
2003.01.29 |
申请人 |
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA |
发明人 |
LEE TAI-CHENG;RAZAVI BEHZAD |
分类号 |
H03K23/66;H03L7/089;H03L7/093;H03L7/099;H03L7/193;(IPC1-7):H03L7/00 |
主分类号 |
H03K23/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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