| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To set a minute delay time highly precisely in a delay circuit capable of setting the delay time of a signal. <P>SOLUTION: Sources and drains of PMOS transistors M21 and M22 to M2n are connected to a signal node N1 where a signal propagates. A gate voltage control circuit 1 selectively outputs the voltage of a power source Vdd or gate control voltages Vcnt1 and Vcnt2 to the Vcntn of a ground voltage to the gates of the transistors M21 and M22 to M2n in accordance with the set delay time. In the transistors M21 and M22 to M2n, parasitic capacitance is changed by the gate control voltages Vcnt1 and Vcnt2 to Vcntn. This selectively changes the capacitance of the signal node N1 to thereby be able to set the delay time of the signal that propagates in the signal node N1. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
