发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND METHOD AND SYSTEM FOR DEFECT ANALYSIS
摘要 PROBLEM TO BE SOLVED: To provide technology for speedily locating a processor or a process where a defect occurs when the detect occurs in manufacture of a semiconductor device. SOLUTION: The position of a mark (notch, orientation flat, wafer ID or alignment mark) formed at the peripheral edge of a wafer is changed for every wafer based on a prescribed rule different for respective processors 11a, 11b and 11c when the wafer is processed in the processors 11a, 11b and 11c. The wafer is processed in the processors 11a, 11b and 11c. In an inspection device 12, the wafer is inspected (probe inspection, foreign matter inspection or appearance inspection) after a processing process. When the defect is detected, the processor or the process being the cause of occurrence of the defect is located, based on the position change of the defect of the wafer with respect to the mark in the computer 13. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005057029(A) 申请公布日期 2005.03.03
申请号 JP20030285629 申请日期 2003.08.04
申请人 TRECENTI TECHNOLOGIES INC 发明人 CHO SEISAI
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址