发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce the capacity of a trench gate type power MISFET simultaneously with preventing punch through thereof. <P>SOLUTION: A trench 7 to form a gate electrode 10 therein is formed in a depth of about 1μm or less to reduce the input capacity and feedback capacity of the trench gate type power MISFET. A p<SP>-</SP>-type semiconductor region 13 is formed in such a depth that the bottom of the trench 7 may not be covered. Below an n<SP>+</SP>-type semiconductor region 15 which will become a source region of the trench gate type power MISFET, a p-type semiconductor region 14 having a higher impurity concentration than the p<SP>-</SP>-type semiconductor region 13, and the p-type semiconductor region 14 is used as a punch through stopper layer of the trench gate type power MISFET. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005057050(A) 申请公布日期 2005.03.03
申请号 JP20030286142 申请日期 2003.08.04
申请人 RENESAS TECHNOLOGY CORP 发明人 SHIRAISHI MASAKI;NAKAZAWA YOSHITO
分类号 H01L29/78;H01L21/265;H01L21/336;H01L29/08;H01L29/10;H01L29/423;H01L29/45;H01L29/49;(IPC1-7):H01L29/78 主分类号 H01L29/78
代理机构 代理人
主权项
地址