DUAL BANK SHARED DATA RAM FOR EFFICIENT PIPELINED VIDEO AND DATA PROCESSING
摘要
<p>The present invention provides a dual bank shared data RAM (130) for efficient pipelined multiprocessor video (205, 210) and data processor. The dual bank memory device comprises two fast memories: a first memory (405) and a second memory (410). A first switch (415) operatively couples to the first memory (405) to a first processor (205). A second switch (420) operatively couples the second memory (410) to a second processor (210). The first switch (415) directs data and address information from the first processor (205) to the first memory (405) and directs data information from the first memory (405) to the first processor (205). The second switch (420) directs data and address information from the second processor (210) to the second memory (410) and directs data information from the second memory (410) to the second processor (210). The dual bank memory device further comprises a control logic (425). The control logic is operatively coupled to the first switch (415) and the second switch (420).</p>
