| 摘要 |
<p>A semiconductor integrated circuit device, i.e. a reset IC(1), comprising a circuit (4) for detecting the rising and falling of an input voltage (Vin) by comparing it with a reference voltage, a circuit (8) for delaying a rising detection signal from the detection circuit (4) by charging a capacitor (C) connected through a connection terminal (CT) and discharging the capacitor (C) by imparting an output signal (Vout) of first voltage, a circuit (9) for holding the rising detection signal delayed by the delay circuit (8), and a driver (10) generating an output signal (Vout) becoming a first voltage by the rising detection signal held by the holding circuit (9) and generating an output signal (Vout) becoming a second voltage by the falling detection signal from the detection circuit (4).</p> |
