发明名称 IC TESTING DEVICE
摘要 PROBLEM TO BE SOLVED: To execute in a short time a test for measuring a response characteristic of an IC to be tested by measuring the operable shortest period by changing the application period of a test pattern applied to the IC to be tested, so as to be gradually shortened. SOLUTION: This device is provided with a subtraction time setting means 60, a subtraction instruction signal CMD for instructing to subtract a subtraction time set in the subtraction time setting means from period data read out from a period data memory 20, a subtraction means for subtracting the subtraction time set in a subtraction time setting part from the period data read out from the period data memory 20 at every time when the subtraction instruction signal is outputted, transmitting the period data subjected to subtraction to a period generation means, and changing the application period of the test pattern following the subtraction time, and an integration means 62 for integrating the subtraction time synchronously with the subtraction operation by the subtraction means, and applying the integrated value to the subtraction means as a next-time subtraction value. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005055314(A) 申请公布日期 2005.03.03
申请号 JP20030286759 申请日期 2003.08.05
申请人 ADVANTEST CORP 发明人 SATO MASATOSHI
分类号 G01R31/3183;G01R31/28;(IPC1-7):G01R31/318 主分类号 G01R31/3183
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