发明名称 METHOD FOR FABRICATING A CONDUCTIVE PLUG IN INTEGRATED CIRCUIT
摘要 A method for fabricating a conductive plug device is disclosed. A semiconductor substrate having a diffusion region thereon is provided. A dielectric layer is deposited over the semiconductor substrate. An opening is formed in the dielectric layer to expose a portion of the diffusion region. An un-doped CVD silicon layer is deposited on interior walls of the opening. A pure CVD phosphorus layer is in-situ deposited on the un-doped CVD silicon layer. The pure CVD phosphorus layer thereafter diffuses into the subjacent un-doped CVD silicon layer to form a doped silicon layer. Subsequently, a second un-doped CVD silicon layer is in-situ deposited on the doped silicon layer.
申请公布号 US2005048766(A1) 申请公布日期 2005.03.03
申请号 US20030605007 申请日期 2003.08.31
申请人 WU WEN-CHIEH;CHEN YI-NAN;WU CHUN-YI 发明人 WU WEN-CHIEH;CHEN YI-NAN;WU CHUN-YI
分类号 H01L21/285;H01L21/768;(IPC1-7):H01L21/476;H01L21/22;H01L21/38;H01L21/44 主分类号 H01L21/285
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