发明名称 STEP-UP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a step-up circuit which can reduce a layout area of a MOS transistor concerning a step-up capability and which perform a step-up operation certainly at a starting time. SOLUTION: The step-up circuit includes the MOS transistors M1-M4 connected in series between an output voltage line 13 and a common connecting line 14 to perform a positive step-up operation of an input voltage VDD. The MOS transistors M1-M3 consist of ordinary P-type MOS transistors, and the MOS transistor M4 consists of an ordinary N-type MOS transistor. The MOS transistors M21-M24 are connected in series between the output voltage line 13 and the common connecting line 14 to perform a positive step-up operation of the input voltage VDD in parallel with the MOS transistors M1-M4. The MOS transistor M21 consists of an ordinary P-type MOS transistor, and the MOS transistor M24 consists of an ordinary N-type MOS transistor. On the other hand, the MOS transistors M22, M23 consist of N-type MOS transistors of a triple well structure. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005057860(A) 申请公布日期 2005.03.03
申请号 JP20030284819 申请日期 2003.08.01
申请人 SEIKO EPSON CORP 发明人 MORIYA ISAMU
分类号 H01L27/04;H01L21/822;H02M3/07;(IPC1-7):H02M3/07 主分类号 H01L27/04
代理机构 代理人
主权项
地址