| 发明名称 |
Magnetic random access memory having test circuit and test method therefor |
| 摘要 |
An MRAM has an internal test circuit. This test circuit detects a bit in a memory cell array, which has a shift in write characteristics, as a defective bit by using a method of applying a one-axis write current along an axis of hard magnetization.
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| 申请公布号 |
US2005047202(A1) |
申请公布日期 |
2005.03.03 |
| 申请号 |
US20030728917 |
申请日期 |
2003.12.08 |
| 申请人 |
SHIMIZU YUUI;IWATA YOSHIHISA;TSUCHIDA KENJI;KISHI TATSUYA |
发明人 |
SHIMIZU YUUI;IWATA YOSHIHISA;TSUCHIDA KENJI;KISHI TATSUYA |
| 分类号 |
G01R31/28;G11C11/15;G11C29/04;G11C29/12;(IPC1-7):G11C11/00 |
主分类号 |
G01R31/28 |
| 代理机构 |
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代理人 |
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