| 摘要 |
<p>A surge voltage suppressor comprises semiconductor surge absorbing devices (3a to 3f) connected individually between power lines (4u, 4v, 4w) of the U, V and W phases which connect an inverter (1) and a motor (2), and/or between GROUND and the power lines (4u, 4v, 4w). The surge absorbing devices (3a to 3f) are adapted to be energized to clamp voltages between opposite terminals thereof when the voltages are higher than a given value. <IMAGE></p> |
