METHOD FOR SIMULATING DIGITAL SYSTEM EQUIPPED WITH PIPELINE PROCESSOR AND PERIPHERAL CONNECTED TO PIPELINE ADDRESS/DATA BUS

摘要

PURPOSE: A method for simulating a digital system equipped with a pipeline processor and a peripheral connected to a pipeline address/data bus is provided to model a part of operation cycles of a core processor with a simplified method on a framework of a PC design environment in order to reduce a development time by reducing complexity of a model. CONSTITUTION: An instruction that an address transaction is performed is detected by polling a record/address pointer. The address transaction of the detected instruction is performed. To order the new instruction, the address pointer completing the address transaction is updated. In case that a value of the record pointer is different from the value of the address pointer, the instruction that the address transaction is performed is ordered by the address pointer.