Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby,申请号KR20020063075-传众专利搜索

首页产品黄页商标征信

会员服务注册登录

法人/股东/高管

发明名称	Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby
摘要
申请公布号	KR100471015(B1)	申请公布日期	2005.02.21
申请号	KR20020063075	申请日期	2002.10.16
申请人		发明人
分类号	G11C5/06;H01L21/8247;H01L21/8242;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C5/06	主分类号	G11C5/06
代理机构		代理人
主权项
地址

您可能感兴趣的专利

VERNEKOMPONENT FOR EN FORDELER I ET TELEKOMMUNIKASJONSNETT

ABNORMAL NOISE DIAGNOSTIC DEVICE FOR MACHINE

PROCESSO PARA A PREPARACAO DE COMBINACOES DE POLIIMIDAS

PROCESSO,DISPOSITIVO E CONJUNTO DE DOSAGEM PARA DETERMINAR O TEOR DE IODO DE UMA AGUA POTAVEL

CURSOR DE FECHO CORREDICO

Automatic planetary gear transmission

Multilayer coated abrasive element for bonding to a backing

Bag closure structure in which a single resealable closure acts as both the primary and secondary closures

Object placement method and apparatus

CONTROL CIRCUIT FOR PIPE LINE

CRADLE OF CARRYING FOR WAFER

AN ELECTRIC VACUUM CLEANER

Ultrasonic probe

Sensing device utilizing magneto electric transducers

Moving target indication unit

Optically active allyl alcohol and process for producing leucotriene B4 using thereof

Antiviral aerosol compositions and pressurized containers containing same

Methods for denitrization

Sputtering method for fabricating thin film