发明名称 СХЕМА РЕГУЛИРОВАНИЯ НАПРЯЖЕНИЯ ДЛЯ ИНТЕГРАЛЬНЫХ СХЕМ ЧИП-КАРТ
摘要 The circuit contains a series regulator with an FET. A capacitor and a further FET, which is provided as a transfer gate and is driven by the POR signal, are connected in series between the source terminal, to which the external supply voltage is applied, and the gate connection. When the external voltage is applied, the FET opens, with the transfer gate switched on, corresponding to the charging of the capacitor which now takes place. Because this charging process takes a certain amount of time, overshoots in the internal voltage are prevented.
申请公布号 RU2003120077(A) 申请公布日期 2005.02.20
申请号 RU20030120077 申请日期 2001.11.21
申请人 ИНФИНЕОН ТЕКНОЛОДЖИЗ АГ (DE) 发明人 ВЕДЕР Уве (DE)
分类号 G06F1/26;G05F1/56;G05F1/565;G06K7/00;G06K19/07;H02M1/14;H02M3/156 主分类号 G06F1/26
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