发明名称 DMA engine for fetching words in reverse bit order
摘要 Presented herein is a direct memory access engine for providing data words in reverse order. The data words are fetched in batches comprising a predetermined number of data words starting from the last data word and proceeding to the first data word. The batches are stored in a local buffer. The contents of the local buffer are transmitted in reverse order. A set of multiplexers reverses the bit positions of the words in the local buffer.
申请公布号 US2005036614(A1) 申请公布日期 2005.02.17
申请号 US20030736125 申请日期 2003.12.15
申请人 PAI RAMADAS LAKSHMIKANTH;VAJHALLYA MANOJ KUMAR;KISHORE CHHAVI;SHERIGAR BHASKAR MALA;KODIHALLI HIMAKIRAN;BHATIA SANDEEP;AGGARWAL GAURAV;MAHADEVAN SIVAGURURAMAN;ARALAGUPPE VIJAYANAND 发明人 PAI RAMADAS LAKSHMIKANTH;VAJHALLYA MANOJ KUMAR;KISHORE CHHAVI;SHERIGAR BHASKAR MALA;KODIHALLI HIMAKIRAN;BHATIA SANDEEP;AGGARWAL GAURAV;MAHADEVAN SIVAGURURAMAN;ARALAGUPPE VIJAYANAND
分类号 G06F13/28;H04N7/167;H04N7/26;H04N7/50;(IPC1-7):H04N7/167 主分类号 G06F13/28
代理机构 代理人
主权项
地址