发明名称 PIN FET AND ITS FORMING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a pin FET and its forming method. SOLUTION: This transistor is arranged on a supporting substrate and is equipped with a pin pattern including a multiplayer pattern composed of at least multiple primary semiconductors and secondary semiconductor patterns which are laminated alternatively. A gate electrode that crosses the upper part of the pin pattern is arranged, and a gate insulating film is placed between the pin pattern and the gate electrode. A pair of impurity diffusion layers is formed on both sides of the gate electrode inside the pin pattern. The primary and secondary semiconductor patterns have a wider lattice width at least in one direction than the silicon lattice width. Due to the foregoing, in the channel region formed inside the pin pattern, the pin FET performance can be improved as the mobility of electric charge increases. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005045263(A) 申请公布日期 2005.02.17
申请号 JP20040214878 申请日期 2004.07.22
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KIM EIHITSU;LEE SUN GHIL;SAI JIEI
分类号 H01L21/336;H01L29/745;H01L29/76;H01L29/78;H01L29/786;(IPC1-7):H01L29/78 主分类号 H01L21/336
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