发明名称 Systems for synchronizing resets in multi-clock frequency applications
摘要 Methods and systems for synchronizing a reset signal with a local clock that drives a circuit. In the circuit, the reset signal can be used to reset one or more flip-flops, memory devices, and/or logic. Sychronization of the reset signal allows the reset signal to change at an appropriate time period in relation to the lock clock signal driving the circuit. This ensures the circuit will remain stable during reset, and no data will be lost as it is processed in the circuit. Other aspects of the invention can include using a plurality of reset signals (e.g., software, hardware, local software, etc.) to form the reset signal and using a reset control system to control resets during testing of the circuit.
申请公布号 US2005036577(A1) 申请公布日期 2005.02.17
申请号 US20030640632 申请日期 2003.08.14
申请人 BROADCOM CORPORATION 发明人 SWEET JAMES D.
分类号 H04N5/44;H04N5/46;H04N5/913;(IPC1-7):H04L7/00 主分类号 H04N5/44
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