发明名称 |
IMAGE PROCESSING SEMICONDUCTOR PROCESSOR |
摘要 |
<p>It is possible to improve transfer efficiency of control information for plotting and display control as well as image data in a image processing semiconductor processor. The image processing semiconductor processor includes a CPU (2), a first bus (3) connected to the CPU, a DMAC (5) for controlling data transfer via the first bus, a bus bridge circuit (4) for transmitting/receiving data to/from the first bus, a 3-dimensional image processing section (6) for receiving a command from the CPU via the first bus and performing 3-dimensional image processing, a second bus (10) connected to the bus bridge circuit and first circuit modules (20 to 23), a third bus (11) connected to the bus bridge circuit and second circuit modules (30 to 33), and a memory interface circuit (7) which can be connected to the first bus, the second bus, the 3-dimensional image processing section, and an external memory (15). The bus bridge circuit can control direct memory access transfer between the external circuit and the second bus.</p> |
申请公布号 |
WO2005015504(A1) |
申请公布日期 |
2005.02.17 |
申请号 |
WO2004JP09427 |
申请日期 |
2004.07.02 |
申请人 |
RENESAS TECHNOLOGY CORP.;HARA, HIROTAKA;HAMASAKI, HIROYUKI;SAEKI, MITSUHIRO;HIRADE, KAZUHIRO;TAKANO, MAKOTO |
发明人 |
HARA, HIROTAKA;HAMASAKI, HIROYUKI;SAEKI, MITSUHIRO;HIRADE, KAZUHIRO;TAKANO, MAKOTO |
分类号 |
G06F13/28;G06F15/78;G06T1/20;G06T11/20;G06T11/40;G06T15/00;(IPC1-7):G06T15/00 |
主分类号 |
G06F13/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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