发明名称 |
Semiconductor fabrication process, lateral PNP transistor, and integrated circuit |
摘要 |
A method in the fabrication of an integrated bipolar circuit comprises the steps of: providing a p-type substrate; forming in the substrate a buried n+-type region and an n-type region above the buried n<+>-type region; forming field isolation areas around the n-type region; forming a PMOS gate region on the n-type region; forming a diffused n<+>-type contact from the upper surface of the substrate to the buried n<+>-type region; the contact being separated from the n-type region; forming a p-type polysilicon source on the n-type region; forming a p-type source in the n-type region; forming a p-type drain in the n-type region; and connecting the PMOS transistor structure to operate as a PNP transistor, wherein the source is connected to the gate and constitutes an emitter of the PNP transistor; the drain constitutes a collector of the PNP transistor; and the n-type region constitutes a base of the PNP transistor.
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申请公布号 |
US2005035412(A1) |
申请公布日期 |
2005.02.17 |
申请号 |
US20040918057 |
申请日期 |
2004.08.13 |
申请人 |
INFINEON TECHNOLOGIES AG, |
发明人 |
NORSTROM HANS;JOHANSSON TED |
分类号 |
H01L21/331;H01L21/8249;H01L27/06;H01L29/735;(IPC1-7):H01L29/00;H01L29/76 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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