发明名称 TRANSCEIVER ARCHITECTURE WITH REDUCED VCO-PULLING SENSITIVITY
摘要 An output signal is generated for transmission in a telecommunications systems. This may involve generating an in-phase radio frequency signal by mixing an in-phase baseband signal with a first radio frequency mixer signal; and generating an alternative-phase radio frequency signal by mixing an alternative-phase baseband signal with a second radio frequency mixer signal. An output signal for transmission is generated by combining the in-phase radio frequency signal with the alternative-phase radio frequency signal, wherein the output signal has a frequency, fRF. The first and second radio frequency mixer signals are generated by generating a voltage controlled oscillator (VCO) output signal having a frequency, fVCO, such that fVCO = (n + ½) . fRF , wherein n = 1,2,3,...; and generating one or more fractional frequency divided signals from the VCO output signal, wherein each of the one or more fractional frequency divided signals has a frequency equal to fRF.
申请公布号 WO2005015759(A1) 申请公布日期 2005.02.17
申请号 WO2004EP07558 申请日期 2004.07.09
申请人 ERICSSON TECHNOLOGY LICENSING AB;EIKENBROEK, JOHANNES, WILHELMUS;VAN ZEIJL, PAULUS, THOMAS, MARIA 发明人 EIKENBROEK, JOHANNES, WILHELMUS;VAN ZEIJL, PAULUS, THOMAS, MARIA
分类号 H03D7/16;H03L7/18;H03L7/197;H04B1/30 主分类号 H03D7/16
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