发明名称 DATA ERASING METHOD, AND MEMORY DEVICE HAVING DATA ERASURE CIRCUIT USING THE METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a data erasing method for shortening a time necessary for data erasure without increasing power consumption for the data erasure, and a memory device having a data erasing circuit using the data erasure method. <P>SOLUTION: In the data erasing method for erasing data stored by discharging charges stored in a floating gate by applying an erasing voltage between a semiconductor substrate and a control gate, the potential of the semiconductor substrate side is increased while the control gate is kept in a floating state, and then the potential of the control gate is set to a predetermined potential, and thus an erasing voltage is applied between the semiconductor substrate and the control gate. The potential of the control gate is set to the predetermined potential by taking a predetermined time for lowering so that the increased potential of the semiconductor substrate side is not lowered. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005038504(A) 申请公布日期 2005.02.10
申请号 JP20030274113 申请日期 2003.07.14
申请人 SONY CORP 发明人 SEKIMOTO SHUNJI;NAMISE TOMOHIRO
分类号 G11C16/02;G11C16/04;G11C16/14;H01L21/8247;H01L27/10;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C16/02
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