| 摘要 |
PROBLEM TO BE SOLVED: To provide a testing device for performing an efficient test by preventing writing of an individual pattern unnecessary for a semiconductor memory device. SOLUTION: This testing device for testing in parallel a plurality of semiconductor memory devices having a common address is equipped with an address generation part for generating successively addresses of the semiconductor memory devices, a pattern generation part for generating an input pattern to be written in the addresses generated by the address generation part in the plurality of semiconductor memory devices, a pattern input part for writing the input pattern successively in parallel in the addresses generated successively by the address generation part in the plurality of semiconductor memory devices, and a control part for selecting whether the input pattern is to be written in the semiconductor memory device or not relative to each address of each semiconductor memory device, and allowing the pattern input part to inhibit writing operation of the input pattern on the address of the semiconductor memory device when the effect that the input pattern is not written is selected. COPYRIGHT: (C)2005,JPO&NCIPI
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