| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a high-performance processor such as a central processing unit (CPU) including a structure and methods for providing a lot of special processor functions and capabilities. <P>SOLUTION: This high-performance processor is provided with a structure and methods for: (1) aggressively scheduling long latency instructions including load/store instructions while maintaining a precise state; (2) maintaining and restoring the precise state at any instruction boundary; (3) tracking an instruction status to maintain the precise state; (4) checkpointing instructions to maintain the precise state; (5) creating, maintaining, and using a time-out checkpoint; (6) tracking floating-point exceptions; (7) creating, maintaining, and using a renameable trap stack; (8) creating, maintaining and using a watchpoint for a plurality of simultaneous, unresolved-branch evaluation; (9) tracking an instruction status for maintaining the precise state; and (10) increasing a processor throughput while maintaining the precise state. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
