发明名称 Instruction sequence verification to protect secured data
摘要 Intended for an information security application, particularly in networked information systems, the present invention includes two methods and systems for verifying a current performance of a command by a controller. A first cyclic redundancy check (CRC) for the command is prestored in memory. A second CRC for the command is calculated after instructions of the command have been performed by the controller. The first CRC is compared with the second CRC. Preferably, the controller is reset if the first CRC does not match the second CRC. Also, an address of a first instruction of the command is compared with an address of a second instruction of the command to determine if there may be a discontinuity between the first and the second instructions. It is determined if the first instruction is a valid instruction from/to which an instruction sequence of the command can be redirected. Preferably, the controller is reset if the first instruction is not a valid instruction from/to which the instruction sequence can be redirected.
申请公布号 US2005033982(A1) 申请公布日期 2005.02.10
申请号 US20040856882 申请日期 2004.06.01
申请人 BROADCOM CORPORATION 发明人 PAASKE TIMOTHY R.
分类号 G06F12/00;G06F21/00;(IPC1-7):G06F12/00 主分类号 G06F12/00
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