FAULT TOLERANCE WITH OBJECT SET BY SPECIAL CPU INSTRUCTION

摘要

PROBLEM TO BE SOLVED: To provide a fault-tolerant and high-availability computer system.

SOLUTION: A decoding circuit of a microprocessor related to this application is so structured as to decode a fault-tolerant version of an instruction and a non-fault-tolerant version of an instruction distinctly from each other. An execution circuit of the microprocessor is so structured as to execute the fault-tolerant version of an instruction with a redundancy checking, and to execute the non-fault-tolerant version of an instruction without the redundancy checking.

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