| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory module which is short in random access time and small in power consumption, in memory modules which are combined of pseudo SRAMs and mass flash memories. <P>SOLUTION: The memory module is constituted of a static random access memory chip PSRAM1 and a nonvolatile memory chip FLASH1. The static random access memory chip PSRAM1 is a memory module having; a memory array MCEL which consists of DRAM cells; a refresh control circuit SREF which controls a refresh operation of DRAM cells; and a nonvolatile memory control circuit PSFCON which controls access between the nonvolatile memory chip FLASH1. Thereby, high-speed data read and write become possible. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
