发明名称 Multilevel Interconnect Structure
摘要 <p>The integrated device comprises, in combination: a first conductive region (6); a first insulating region (7) of dielectric material, covering the first conductive region; a first through region (15) of electrically conductive material, extending inside the first insulating region (7), and in direct electrical contact with the first conductive region (6); a second conductive region (10a), arranged above the first insulating region (7), in a position not aligned and not in contact with the first through region (15); a second insulating region (9) of dielectric material, covering the second conductive region (10a); a second through region (21) of electrically conductive material, extending inside the second insulating region (9) as far as the first through region (15), aligned and in direct electrical contact with the first through region; and a third conductive region (11a), arranged above the second insulating region (9), aligned and in direct electrical contact with the second through region (21). <IMAGE></p>
申请公布号 EP0989609(B1) 申请公布日期 2005.02.09
申请号 EP19980830562 申请日期 1998.09.25
申请人 STMICROELECTRONICS S.R.L. 发明人 PIO, FEDERICO
分类号 H01L21/768;H01L23/522;(IPC1-7):H01L23/522 主分类号 H01L21/768
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