| 摘要 |
A semiconductor memory device having as its main storage portion a capacitor storing charges as binary information and an access transistor controlling input/output of the charges to/from the capacitor, and eliminating the need for refresh, is obtained. The semiconductor memory device includes a capacitor with a storage node located above a semiconductor substrate and holding the charges corresponding to a logical level of stored binary information, an access transistor located on the semiconductor substrate surface and controlling input/output of the charges accumulated in the capacitor, and a latch circuit located on the semiconductor substrate and maintaining a potential of the capacitor storage node. At least one of circuit elements constituting the latch circuit is located above the access transistor.
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