SEMICONDUCTOR DEVICE WITH FLOATING TRAP TYPE NON-VOLATILE MEMORY CELL AND FABRICATING METHOD THEREOF TO CONTROL THICKNESS OF HIGH VOLTAGE GATE OXIDE LAYER WITHOUT INCREASING THICKNESS OF BLOCKING OXIDE LAYER AND SHORTEN INTERVAL OF PROCESS TIME

摘要

PURPOSE: A semiconductor device with a floating trap type non-volatile memory cell is provided to control the thickness of a high voltage gate oxide layer without increasing the thickness of a blocking oxide layer and shorten an interval of process time by forming a thermal oxide layer to form the high voltage gate oxide layer after a deposition oxide layer is formed. CONSTITUTION: A substrate includes a non-volatile memory region, the first region and the second region. A memory gate pattern in which a tunnel oxide layer, a charge storing layer, a blocking oxide layer(315) and a conductive layer are sequentially stacked is formed on the non-volatile memory region such that the blocking oxide layer is an oxide layer including nitrogen atoms. The first gate pattern in which the first gate oxide layer(435) and a conductive layer are sequentially stacked is formed on the first region such that the first gate oxide layer is an oxide layer including nitrogen atoms. The second gate pattern in which the second gate oxide layer(475) and a conductive layer are sequentially stacked is formed on the second region.