| 摘要 |
PURPOSE: A dual port RAM employing DRAM cell is provided to reduce the layout area by employing DRAM cell while the dual port RAM is compatible with SRAM. CONSTITUTION: A dual port RAM accessible to a memory array in independently response to the first chip selecting signal and the second chip selecting signal, and interfacing with an external system which offers a row address and column address simultaneously, comprises a memory array(10) having plural memory cells arranged on the matrix defined in a row and in a column; the first port(21) for accessing to the memory array in response to the first chip selecting signal; the second port(33) for accessing to the memory array in response to the second chip selecting signal; a refresh flag generating part(59); the first control part(45) and the second control part(51) for performing the access from the first port prior to the access from the second port when the first chip selecting signal and the second chip selecting signal are activated simultaneously. Wherein, the memory cells are DRAM cells which are needed to refresh within the refresh period in order to store the data.
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