Taktsignalzuführvorrichtung

摘要

A clock signal supplying apparatus of the present invention permits each of sync detectors 11i to extract a clock signal CKi and a sync signal SYNi from a cell input data CIi and delivers in synchronism with the sync signal SYNi an input data DIi derived from the cell input data CIi. The clock signal CKi is transferred to a master clock generator 12 for generating a master clock MC. The input data DIi is delivered along with the sync signal SYNi to a clock signal supplying circuit 20i where it is judged from the first bit of the input data DIi whether the input data DIi is eligible or not. When it is judged yes, the clock signal supplying circuit 20i supplies the master clock MC as the clock signal CLKi to a corresponding functional block (S/P converter) 13i for a period required for carrying out a given logic operation. Accordingly, the clock signal supplying apparatus of the present invention allows the functional blocks which may constitute an ATM switchboard to be supplied with their respective clock signals only when requested, thus minimizing the generation of noise and the energy consumption.