| 摘要 |
A decoding apparatus comprises a variable length decoder that decodes zero-run length and nonzero coefficient, an inverse quantizer that inverse-quantizes the nonzero coefficient, a zero-run reconstruction processor that reconstruct zero coefficients, a FIFO memory that store the zero-run length data and nonzero coefficients, an inverse discrete cosine transformer that subjects the coefficients to an inverse discrete cosine transformation, and a motion compensator that subjects the transformed result to a motion compensation.
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