发明名称 Combined barrier layer and seed layer
摘要 Methods and apparatus for forming conductive interconnect layers useful in articles such as semiconductor chips, memory devices, semiconductor dies, circuit modules, and electronic systems. The number of necessary processing steps to form conductive interconnects are reduced by removing the need to employ a seed layer interposed between the barrier layer and the conductive interconnect layer. This is accomplished in part through the electrochemical reduction of oxides on a dual-purpose layer. The present invention can be advantageously utilized to deposit copper interconnects onto tungsten.
申请公布号 US2005023516(A1) 申请公布日期 2005.02.03
申请号 US20040929252 申请日期 2004.08.30
申请人 MICRON TECHNOLOGY, INC. 发明人 CHOPRA DINESH
分类号 H01L21/288;H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/288
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