Formation of self-aligned contact structure involves planarizing upper conductive layer and sacrificial mask patterns until upper surfaces of recessed mask patterns are exposed to form plug surrounded by spacer

摘要

#CMT# #/CMT# A self-aligned contact structure is formed by forming a spacer that covers a sidewall of a self-aligned contact hole; forming an upper conductive layer that fills the self-aligned contact hole on the entire surface of a semiconductor substrate having the spacer; and planarizing the upper conductive layer and sacrificial mask patterns until upper surfaces of recessed mask patterns are exposed to form a plug surrounded by the spacer. #CMT# : #/CMT# Formation of a self-aligned contact structure includes forming parallel interconnection patterns (350) on a semiconductor substrate (100), where each interconnection pattern has an interconnection and a mask pattern stacked in sequence; forming interlayer insulating layer patterns that fill gap regions between the interconnection patterns; partially etching the mask patterns to form recessed mask patterns that define grooves between the interlayer insulating layer patterns; forming sacrificial mask patterns (600) that fill the grooves; etching a predetermined region of one of the interlayer insulating layer patterns using the sacrificial mask patterns as etching masks to form a self-aligned contact hole (750) that exposes a predetermined region of the substrate; forming a spacer (650) that covers a sidewall of the self-aligned contact hole; forming an upper conductive layer that fills the self-aligned contact hole on the entire surface of the substrate having the spacer; and planarizing the upper conductive layer and the sacrificial mask patterns until upper surfaces of the recessed mask patterns are exposed to form a plug surrounded by the spacer. #CMT#USE : #/CMT# For forming a self-aligned contact structure. #CMT#ADVANTAGE : #/CMT# The method is capable of lowering a height of a contact plug and preventing etching damages of top surfaces of interconnections as well as preventing shorts or breakdown voltage decreases between the interconnections and the plug. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The figure is a cross-sectional diagram illustrating a method of forming a self-aligned contact structure. 100 : Semiconductor substrate 350 : Interconnection patterns 600 : Sacrificial mask patterns 650 : Spacer 750 : Self-aligned contact hole #CMT#ELECTRONICS : #/CMT# Preferred Method: The step of forming the interconnection patterns includes sequentially forming a lower conductive layer and a mask layer on the substrate; and patterning the mask layer and the lower conductive layer. The lower conductive layer is formed by stacking a polysilicon layer and a metal silicide layer in sequence, or by stacking a diffusion barrier layer and a metal layer in sequence. The mask layer is formed of an insulating layer having a low etching rate for an etchant of the lower conductive layer. The interlayer insulating layer patterns are formed of a low dielectric constant (k) dielectric layer having a low k with respect to the silicon nitride layer and a low etching rate for an etchant of the mask patterns. The sacrificial mask patterns are formed of a material layer having a lower etching rate than the mask patterns for an etching recipe for etching the interlayer insulating layer patterns. The spacer is formed of the same material with the interlayer insulating layer patterns. Preferred Component: The insulating layer is a silicon nitride layer. The low-k dielectric layer is a silicon oxide layer. The material layer is a polysilicon layer. The upper conductive layer is a polysilicon layer.