发明名称 Clock generator with skew control
摘要 Systems and methods are disclosed to provide clock generation. In accordance with one embodiment, a clock generator chip is provided that is configurable and in-system programmable and includes a flexible skew control architecture. The clock generator chip may also provide programmable input circuits, programmable output circuits, and permit a JTAG boundary scan.
申请公布号 US2005024105(A1) 申请公布日期 2005.02.03
申请号 US20030629221 申请日期 2003.07.29
申请人 LATTICE SEMICONDUCTOR CORPORATION 发明人 AGRAWAL OM P.;KLEIN HANS W.;RICKARD GEOFFREY R.;WELLER HARALD J.
分类号 H03L7/089;H03L7/099;H03L7/18;(IPC1-7):H03L7/06 主分类号 H03L7/089
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