发明名称
摘要 The present invention relates to the design-time and run-time environments of instruction processors implemented in re-programmable hardware. In one aspect the present invention provides a design system for generating configuration information and associated executable code base on a customization specification, which includes application information including application source code and customization information including design constraints, for implementing an instruction processor using re-progammable hardware, the system comprising: a template generator; an analyzer; a compiler; an instantiator, and a builder. In another aspect the present invention provides a management system for managing run-time re-configuration of an instruction processor implemented using re-programmable hardware, comprising: a configuration library; a code library; a loader; a loader controller; a run-time monitor; an optimization determiner; and an optimization instructor.
申请公布号 JP2005503680(A) 申请公布日期 2005.02.03
申请号 JP20020543290 申请日期 2001.11.19
申请人 发明人
分类号 H03K19/173;G06F9/318;G06F9/44;G06F9/445;G06F9/45;G06F15/78;G06F17/50 主分类号 H03K19/173
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