发明名称 Test apparatus
摘要 A waveform formatter according to the present invention includes a first delay circuit for delaying a set signal to control the timing of a first change point of a test signal, a second delay circuit for delaying a reset signal to control the timing of a second change point of the test signal changed by the set signal which the first delay circuit delays, a third delay circuit for delaying a set signal to control the timing of a third change point of the test signal, a fourth delay circuit for delaying a reset signal to control the timing of a fourth change point of the test signal changed by the set signal which is delayed by the third delay circuit, a fifth delay circuit for delaying a set signal to control the timing of a first change point of an enable signal of the driver, a sixth delay circuit for delaying a reset signal to control the timing of a second change point of an enable signal with regard to the driver during a predetermined cycle of a cycle reference signal.
申请公布号 US2005024036(A1) 申请公布日期 2005.02.03
申请号 US20040922587 申请日期 2004.08.20
申请人 ADVANTEST CORPORATION 发明人 NEGISHI TOSHIYUKI
分类号 G01R31/30;G01R31/319;(IPC1-7):G01R19/00 主分类号 G01R31/30
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