发明名称 Digital interface with potentiometer
摘要 An interface for a lamp operating device, in particular a ballast (EVG) for gas discharge lamps, has two input side terminals of a digital control input SE and a evaluation logic (AL) which is constituted for processing both digital signals applied to the terminals and also mains voltage signals. The amplitude of a mains voltage applied to the terminals is continuously settable by means of a voltage divider (ST) or a potentiometer. The amplitude of the applied mains voltage is converted into pulse width information (PWM) which in turn the evaluation logic converts into control commands, for example dimming setting values, for a ballast (EVG).
申请公布号 US2005023989(A1) 申请公布日期 2005.02.03
申请号 US20040879110 申请日期 2004.06.30
申请人 TRIDONICATCO GMBH & CO. 发明人 JUEN REINHOLD
分类号 H05B37/02;(IPC1-7):H05B39/04 主分类号 H05B37/02
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