发明名称 |
METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO PREVENT MOAT USING THERMAL OXIDATION SPACER |
摘要 |
PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to effectively prevent a moat at boundary between the isolation layer and an active region by forming a thermal oxidation spacer at sidewalls of the HDP oxide layer. CONSTITUTION: A trench(24) is formed at an isolation region of a silicon substrate(21) by using a pad oxide pattern(22) and a pad nitride pattern. A sidewall oxide layer is formed on the trench. An HDP oxide layer is filled in the trench and planarized to expose the pad nitride layer. The exposed pad nitride layer is removed. A polysilicon spacer is formed at both sidewalls of the HDP oxide layer. A thermal oxidation spacer(29) is formed by performing oxidation processing. The HDP oxide layer and the thermal oxidation spacer are selectively removed, thereby forming an isolation layer.
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申请公布号 |
KR20050012652(A) |
申请公布日期 |
2005.02.02 |
申请号 |
KR20030051789 |
申请日期 |
2003.07.26 |
申请人 |
MAGNACHIP SEMICONDUCTOR, LTD. |
发明人 |
LEE, KWANG HO |
分类号 |
H01L21/76;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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