发明名称 Controller apparatus for a communication bus
摘要 <p>A controller node (3 - 6) for communication with remote nodes (11 - 25) over a communication bus (1), especially a CAN bus. The controller node comprises a data processing unit (30) for generating signals to be transmitted and for processing signals received over the communication bus (1), and a management unit (31) responsive to event signals from the remote nodes (11 - 25) and/or from the data processing unit (30) for generating control signals controlling the operating state of the data processing unit (30). &lt;??&gt;The management unit (31) includes a crystal or resonator frequency reference (37), and an oscillator (36) controlled by the reference frequency for generating a clock signal. A clock switch (38) supplies the clock signal to at least a part of the data processing unit (30) during at least a first operating mode of the data processing unit and interrupts supply of the clock signal during a second operating mode of the data processing unit. A power switch (39) supplies power from a voltage regulator in the management unit to at least the part of the data processing unit (30) during at least the first operating mode of the data processing unit and interrupts the supply of power during another operating mode of the data processing unit. &lt;??&gt;The data processing unit (30) can operate in the second operating mode with reduced quiescent current but a fast wake-up time. &lt;IMAGE&gt;</p>
申请公布号 EP1503269(A1) 申请公布日期 2005.02.02
申请号 EP20030291903 申请日期 2003.07.31
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 HUBER, YVES;BOGAVAC, DAVOR;MOUNIER, PHILIPPE
分类号 G06F1/32;(IPC1-7):G06F1/32 主分类号 G06F1/32
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