发明名称 |
Duobinary to binary decoder |
摘要 |
<p>A duobinary-to-binary signal converter includes a pair of comparators coupled to a logic gate. Each comparator receives a copy of a duobinary-encoded analog signal applied to the converter and is designed to generate a binary output based on the comparison of the magnitude of the received signal with a corresponding threshold voltage. The outputs of the comparators are fed into the logic gate, which generates a binary sequence corresponding to the duobinary-encoded signal. A representative converter of the invention can perform relatively well at bit rates as high as about 40 Gb/s and can be conveniently incorporated into an appropriate integrated device (e.g., an ASIC) for a data transmission system employing duobinary signaling. <IMAGE></p> |
申请公布号 |
EP1503501(A1) |
申请公布日期 |
2005.02.02 |
申请号 |
EP20040254284 |
申请日期 |
2004.07.16 |
申请人 |
LUCENT TECHNOLOGIES INC. |
发明人 |
ADAMIECKI, ANDREW L.;SINSKY, JEFFREY H. |
分类号 |
H03M5/18;H04L25/497;(IPC1-7):H03M5/18 |
主分类号 |
H03M5/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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