发明名称
摘要 PURPOSE: A method for fabricating a semiconductor device is provided to guarantee a process margin of a gate oxide layer by forming a well region after an isolation layer is formed and by performing a planarization process after a gate oxide layer and a pad nitride layer are formed by using a barrier layer for forming an isolation process. CONSTITUTION: The well region(102) is formed in a semiconductor substrate(100). The gate oxide layer(104) and the pad nitride layer(106) that are composed of a high dielectric material are formed on the semiconductor substrate. A gate electrode is formed on the semiconductor substrate. A source/drain region is formed at both sides of the gate electrode.
申请公布号 KR100469333(B1) 申请公布日期 2005.02.02
申请号 KR20010083489 申请日期 2001.12.22
申请人 发明人
分类号 H01L27/092 主分类号 H01L27/092
代理机构 代理人
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