| 摘要 |
A receiving circuit comprises an A/D converter which converts a receive signal to a digital signal having a first data format at a sampling rate corresponding to twice the spreading bandwidth of the receive signal, an analog front-end interface which converts the first data format of the digital signal to a second data format, a searcher which detects a phase of the digital signal having the second data format to perform a synchronization capture and outputs a timing signal, an interpolation filter which samples the digital signal having the second data format at a sampling rate different from the sampling rate of the A/D converter, a rake receiver which detects the synchronism of a signal outputted from the interpolation filter based on the timing signal and a demodulator which demodulates a signal outputted from the rake receiver. |
